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Greetings!
Welcome to the February issue of Residue News
| Upcoming Events |
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Look for Eric and Paco at APEX in Las Vegas. They will be
participating in Standards Committee meetings and hanging out
on the show floor.
Eric Camden will be presenting, "Relationship of Via
Size and Cleanliness," at APEX. His presentation will be
on April 7, 2010 at 3:00 p.m., session 25.
His presentation will explore multiple via sizes, different
approaches to cleaning, and, based on the cleanliness data,
what might be the most viable option for producing good
performing product.
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| Meet the Problem |
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Selective Coating Removal
It is not uncommon at Foresite for our staff to be
challenged with new product issues by our customers. This past
year we were approached by a customer whose product had been
coated in paralyene. After a short time, less than a year in
the field, the paralyene was discoloring and adversely
affecting product performance. Complete removal of the
paralyene was not an option since specific areas of the
product required the coating.
Having been successful in developing methods for stripping
conformal coating, we looked at similar ways to remove the
paralyene. These methods were quickly ruled out, due to the
inability to control which areas were stripped. As we narrowed
our options, plasma cleaning became the most viable choice. We
began experimenting with recipes for the plasma oven and
designing fixtures to protect the areas where paralyene needed
to be retained. After fine tuning the process, plasma cleaning
has proven to be extremely effective. We have seen 100%
removal from specified locations while maintaining the
integrity of the remaining, coated areas.
More recently we have been experimenting with plasma
cleaning to increase the solderability of surfaces. A customer
had product that had been stored and unused for over five
years. The assemblies had oxides in vias and on pads,
resulting in areas that were not conducive to soldering.
Utilizing a short-dwell plasma exposure, the oxides were
removed, surfaces were solderable and product was fully
recovered.
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| Cross Section Techniques |
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Cross sectioning allows for in-depth analysis of the inner
layers of PCBs, PCBAs, and components, catching weaknesses
that are almost impossible to pinpoint. A cross sectioned
sample can effectively reveal stack-up structures, PCB plating
thickness, solder coverage, and conditions affecting wetting.
Traditionally, an area is cut from the board and
encapsulated in a 1" diameter epoxy puck. The specimen is then
rough cut and repeatedly polished until the area of interest
is exposed and can be inspected, photographed and reported
upon. An alternative to the puck is a three-point fixture.
Utilizing the fixture, we are able to easily and quickly focus
on the area of interest, commonly concentrating on an area as
small as two or three solder balls on a BGA. The fixtured
sample still requires polishing; however, there is less
material to remove allowing for faster processing. Both
methods can produce satisfactory results.
There are still instances when the puck should be the
method of choice; however the three-point fixture is a more
efficient way for us to perform cross section analysis, when
applicable.
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Foresite is Participating in
PERM |
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PERM, the Pb-Free Electronics Risk Management Consortium,
is providing leadership and coordination of Pb-free
electronics risk management activities for the aerospace,
defense and high-performance communities. The PERM consortium
is chartered by the Aerospace Industries Association (AIA) and
includes support from DoD, DoE, FAA, NASA, industry, academia,
and international members. Foresite is supporting this effort.
Terry presented Foresite Pb-free, and in particular tin
whisker, research findings to PERM at the September, 2009,
Naval Surface Warfare Center meeting, Crane, Indiana. Steve
Ring represented Foresite at the next meeting held in January,
2010, at the Y-12 National Security Complex, Oak Ridge,
Tennessee. We are especially supporting the Standards &
Handbooks and Research Coordination task teams.
Foresite's DoD-funded research for the development of an
effective, accelerated tin whisker test method is one of the
research projects being tracked by the PERM Research
Coordination team. The focus is coordination of R&D that
addresses the technical knowledge gaps associated with Pb-free
electronics, as identified by the Pb-Free Electronics Risk
Reduction Program (formerly known as the Electronics Manhattan
Project). |
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